点击数: 更新日期: 2022-03-24
金洲，1990年生，博士，副教授，硕士生导师，中国计算机学会集成电路专委会委员。入选2022-2024年北京市科协青年人才托举工程。2010年本科毕业于南京大学计算机科学与技术专业，2012年和2015年分别于日本早稻田大学获VLSI集成电路系统专业硕士与博士学位，早稻田大学研究中心博士后，Global COE研究员。研究方向为晶体管级超大规模集成电路仿真验证技术、数值线性代数和并行计算、基于新型器件和新型计算范式的电路、架构、算法协同设计等。在DAC、PPoPP、IPDPS、ASP-DAC、GLSVLSI等EDA和HPC领域重要国际会议和期刊上发表学术论文20余篇，多个研究成果已应用于国产EDA商业仿真软件中，并显著加速工业界实际电路的验证。担任DAC、ICPP、CLUSTER等重要国际会议的程序委员会委员，TODAES, Integration VLSI等多个期刊审稿人。曾获IEEJ九州支部长奖励、帝人久村奖学金、早稻田大学优秀青年博士奖学金等。
欢迎对EDA、芯片、数值算法和并行计算感兴趣的同学加入课题组！
google scholar：
https://scholar.google.com/citations?hl="en&user=Iw11vncAAAAJ&view_op=list_works&sortby=pubdate
联系方式:
办公地址：主楼B座1515
办公电话：010-89733787
E-mail：jinzhou@cup.edu.cn
通信地址：北京市昌平区府学路18号中国石油大学(北京)信息学院计算机系102249
研究生招生专业:
计算机科学与技术(硕士）
受教育情况:
2006年9月-2010年6月，南京大学计算机科学与技术系，理学学士
2010年9月-2012年9月，早稻田大学，大规模集成电路系统专业，工学硕士
2012年9月-2015年10月，早稻田大学 ，大规模集成电路系统专业，工学博士
学术服务：
DAC‘22，ICPP’21，Cluster'21程序委员会委员
TODAES, Integration VLSI期刊审稿人
第六届ChinaDA宣传主席
第二届CCF-DAC出版主席
第四期CCF数图专辑“芯片敏捷设计方法初探”编委
科研与教改项目：
2022-2023，国家重点研发计划“高性能计算”重点专项青年科学家项目，2021YFB0300600，面向千万核的智能超算算法和应用忠的混合精度研究
2022-2023，计算机体系结构国家重点实验室课题，CARCHA202115，忆阻器并行架构上的解法器性能优化研究
2022-2022，科学与工程计算国家重点实验室课题（重大），并行自适应有限元程序开发平台（PHG）开源社区建设
2021-2022，光合基金A类应用课题，面向海光C86高性能计算机的超大规模集成电路模拟仿真
2021-2022，企业横向课题，超大规模非线性射频电路直流分析算法优化
2021，教育部产学研协同育人项目，基于飞腾CPU的数值计算（英文）课程建设
2021，教育部产学研协同育人项目，人工智能EDA实践教学与研究基地建设
2021，教育部产学研协同育人项目，基于玄铁CPU的数值计算（英文）课程建设
2019，A类应用课题，面向神威高性能计算机的超大规模集成电路低电压设计模拟仿真
获奖和成果:
北京市科协青年人才托举工程
集成电路EDA设计精英挑战赛，全国二等奖，优秀奖，学术进取奖，优秀指导教师奖
全国大学生集成电路创新创业大赛，北京市二等奖，全国二等奖，优秀指导教师奖
百门优质课程银课《大学生计算机基础（全英授课）》
日本电气学会IEEJ 九州支部长奖
北京市高等教育学会，计算机教育研究分会，教学精彩片段交流比赛二等奖
学术论文：
[1] Zhou Jin; Haojie Pei; Yichao Dong; Xiang Jin; Xiao Wu; Wei W.Xing; Dan Niu; “Accelerating Nonlinear DC Circuit Simulation with Reinforcement Learning”, ACM 59th Design Automation Conference (DAC 2022) , San Francisco, 2022. (CCF-A)
[2] Yuyao Niu; Zhengyang Lu; Haonan Ji; Shuhui Song; Zhou Jin; Weifeng Liu;“TileSpGEMM: A Tiled Algorithm for Parallel Sparse General Matrix-Matrix Multiplication on GPUs”, 27th ACM SIGPLAN Annual Symposium on Principles and Practice of Parallel Programming (PPoPP 2022) , 2022.(CCF-A)
[3] Yufei Chen; Haojie Pei; Xiao Dong; Zhou Jin; Cheng Zhuo*; “Application of Deep Learning in Back-End Simulation: Challenges and Opportunities”, 26th Asia and South Pacific Design Automation Conference ( ASP-DAC 2022 ), Virtual Conference, 2022. (Invited paper)
[4] Jianqi Zhao; Yao Wen; Yuchen Luo; Zhou Jin*; Weifeng Liu; Zhenya Zhou; “SFLU: Synchronization-Free Sparse LU Factorization for Fast Circuit Simulation on GPUs”, ACM 58th Design Automation Conference (DAC 2021) , San Francisco, 2021. (CCF-A)
[5] Yuyao Niu; Zhengyang Lu; Meichen Dong; Zhou Jin*; Weifeng Liu; Guangming Tan; “TileSpMV:A Tiled Algorithm for Sparse Matrix-Vector Multiplication on GPUs”, IEEE 35th International Parallel and Distributed Processing Symposium (IPDPS 2021) , Portland, 2021. (CCF-B)
[6] Zhou Jin; Tian Feng; Yiru Duan; Xiao Wu; Minghou Cheng; Zhenya Zhou; Weifeng Liu; “PALBBD: A Parallel ArcLength Method Using Bordered Block Diagonal Form for DC Analysis”, ACM 31st Great Lakes Symposium on VLSI (GLSVLSI 2021), Virtual Event, New York, USA, 2021. (CCF-C)
[7] Yuechen Lu; Yuchen Luo; Haocheng Lian; Zhou Jin; Weifeng Liu; “Implementing LU and Cholesky factorizations on artificial intelligence accelerators”, CCF Transactions on High Performance Computing , 2021.
[8] Haonan Ji; Shibo Lu; Kaixi Hou; Hao Wang; Zhou Jin*; Weifeng Liu; Brian Vinter; “Segmented Merge: A New Primitive for Parallel Sparse Matrix Computations”, International Journal of Parallel Programming , 2021, 49(5): 732-744.
[9] Zhou Jin; Meiping Liu; Xiao Wu; “An Adaptive Dynamic-element PTA Method for Solving Nonlinear DC Operating Point of Transistor Circuits”, IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS 2018) , Canada, 2018.
[10] Zhou Jin; Xiao Wu; Dan Niu; Xiaoli Guan; Yasuaki Inoue; “Effective Ramping Algorithm and Restart Algorithm in the SPICE3 Implementation for DPTA Method”, IEICE Nonlinear Theory and Its Applications , 2015, 6(4): 499-511.
[11] Zhou Jin; Xiao Wu; Dan Niu; Yasuaki Inoue; “Effective Implementation and Embedding Algorithms of CEPTA Method for Finding DC Operating Points”, IEICE Transactions Fundamentals of Electronics, Communications and Computer Sciences , E96-A(12): 2524-2532, 2013.
[12] Zhou Jin, Dan Niu and Xiao Wu, “Improved SPICE3 Implementation Algorithms of Compound Element Pseudo-Transient Analysis for Solving Nonlinear DC Circuits”, CAC2017 , Jinan, Oct.20-22, 2017.
[13] Zhou Jin, Dan NIU and Xiao Wu, “Parameter Optimization and Initial Value methods of PTA method for DC analysis”, the 8th International Conference on Intelligent Control and Information Processing (ICICIP 2017) , Hangzhou, China, Nov.3-5, 2017.
[14] Xiao Wu, Zhou Jin, Dan Niu and Yasuaki Inoue, “An Adaptive Time-Step Control Method in Damped Pseudo-Transient Analysis for Solving Nonlinear DC Circuit Equations,” IEICE Transactions Fundamentals of Electronics, Communications and Computer Sciences , Vol.E100-A, No.02, pp.619-628, Feb. 2017.
[15] Dan Niu, Zhou Jin and Xiao Wu, “Global Convergence of the Newton Fixed-point Homotopy Method for MOS Transistor Circuits”, CAC2017 , Jinan, Oct.20-22, 2017.
[16] Zhou Jin, Xiao Wu, and Yasuaki Inoue, “A norm step size control algorithm for the PTA method to find DC operating points,” the 8th International collaboration Symposium on Information, Production and Systems (ISIPS 2014) , Kitakyushu, Nov. 2014.
[17] Zhou Jin, Xiao Wu, Dan Niu and Yasuaki Inoue, “A ramping method combined with the damped PTA algorithm to find the DC operating points for nonlinear circuits,” IEEE, the 14th International Symposium on Integrated Circuits (ISIC), Singapore, pp.576-579, Dec.10-12, 2014.
[18] Xiao Wu, Zhou Jin, Dan Niu and Yasuaki Inoue, “PTA Method Using Numerical Integration Algorithms with Artificial Damping for Solving Nonlinear DC Circuits,” IEICE Nonlinear Theory and Its Applications, Vol.E5-N, No.4, pp.512-522, Oct. 2014.
[19] Zhou Jin, Xiao Wu, Xiaoli Guan, Dan Niu and Yasuaki Inoue, “An Effective Ramping PTA Method for the DC Analysis of Nonlinear Circuits,” IEICE, the 28th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC2013) , Yeosu, Korea, pp.317-320, June 30-July 3, 2013.
[20] Dan Niu, Xiao Wu, Zhou Jin and Yasuaki Inoue, “An effective and globally convergent Newton fixed-point homotopy method for MOS transistor circuits,” IEICE Transactions Fundamentals of Electronics, Communications and Computer Sciences , Vol.E96-A, No.9, pp.1848-1856, Sep. 2013.
[21] Zhou Jin, Xiao Wu and Yasuaki Inoue, “An Effective Implementation and Embedding Algorithm of PTA Method for Finding DC Operating Points,” IEEE International Conference on Communications, Circuits and Systems (ICCCAS2012) , pp.417-420, Taichung, Aug.20-22 2012.
[22] Zhou Jin, Xiao Wu, Dan Niu and Yasuaki Inoue, “Effective Implementation and Embedding Algorithms of CEPTA Method for Finding DC Operating Points,” IEE Japan Technical Meeting on “Electronic Circuits” , 電気学会電子回路研究会(熊本大学), vol. ECT-12-77, pp.87-91, Kumamoto, Oct. 2012.